DBCI on IBM Quantum: Real-Hardware Observation of Dimensional-Collapse Saturation Across Devices

We report the first real-hardware implementation and verification of Dual Boundary Condition Inference (DBCI) on IBM Quantum systems. This work validates the predicted size-dependent transition in DBCI's information flow dynamics. Leveraging the ibm_brisbane (127-qubit) and ibm_fez processors, we conducted a systematic analysis using random-circuit sampling across an unprecedented range of 9–100 qubits. The experimental results established a robust, reproducible entropy-collapse signature characterized by three distinct regimes: Amplification (Small Circuits, < 13 qubits): Demonstrated significant multi-bit coherence gains ( bits). Saturation (Large Circuits, qubits): Consistently converged to the theoretical algebraic limit, bits. Bistability (Intermediate Circuits): A sharp crossover regime between the two limits. Matched noiseless simulations confirmed that this entire three-regime structure—amplification, bistability, and saturation—arises solely from the intrinsic algebraic properties of the DBCI update kernel, rather than from hardware noise. High-precision verification showed that the marginal hardware–simulator offset was statistically indistinguishable from zero. This evidence suggests that the saturation represents a hardware-stable invariance condition inherent to dual-boundary inference, indicating a deterministic crossover between finite-size coherence effects and fundamental boundary-limited information flow in quantum systems.