VSlib: A C++ library for next-generation voltage source control at CERN

The ongoing upgrades to CERN power converters pose new challenges to the converter control hardware that require a next-generation embedded control computer: the Function Generator/Controller 4 (FGC4), currently in development. The hardware is based on an AMD Zynq UltraScale+ MPSoC System-on-Chip (SoC), featuring a quad-core A53 ARM-architecture CPU, with one bare-metal core dedicated to the voltage source control. To fulfil the goal of high-reliability control in this integrated environment, a C++20 library to run on bare-metal, called VSlib (Voltage Source library) has been developed. The library is a toolkit providing all the necessary building blocks for regulation algorithms, as well as communication with other bare-metal and Linux-running cores of the SoC. A dedicated GUI was created to facilitate configuration of library parameters. The main focus was placed on high performance, determinism, and reliability. The library was developed according to best industrial practices, including version control, static analysis, and automated unit testing, with tests against expert models using Hardware-in-a-Loop simulator of a power converter, and continuous deployment.

Publication Details

Journal
JACOW
Published
2025-11-05
DOI
https://doi.org/10.18429/jacow-ipac2025-thpm098
Primary Topic
Real-time simulation and control systems
Type
article
Field-Weighted Citation Impact
0.00
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article

VSlib: A C++ library for next-generation voltage source control at CERN

JACOW
Real-time simulation and control systems
article

VSlib: A C++ library for next-generation voltage source control at CERN

article en

Abstract

The ongoing upgrades to CERN power converters pose new challenges to the converter control hardware that require a next-generation embedded control computer: the Function Generator/Controller 4 (FGC4), currently in development. The hardware is based on an AMD Zynq UltraScale+ MPSoC System-on-Chip (SoC), featuring a quad-core A53 ARM-architecture CPU, with one bare-metal core dedicated to the voltage source control. To fulfil the goal of high-reliability control in this integrated environment, a C++20 library to run on bare-metal, called VSlib (Voltage Source library) has been developed. The library is a toolkit providing all the necessary building blocks for regulation algorithms, as well as communication with other bare-metal and Linux-running cores of the SoC. A dedicated GUI was created to facilitate configuration of library parameters. The main focus was placed on high performance, determinism, and reliability. The library was developed according to best industrial practices, including version control, static analysis, and automated unit testing, with tests against expert models using Hardware-in-a-Loop simulator of a power converter, and continuous deployment.

JACOW
Industry, innovation and infrastructure
Openalex Percentile: Top 42%
Real-time simulation and control systems
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VSlib: A C++ library for next-generation voltage source control at CERN · JACOW (2025) | TGRS Research Map | TGRS