Hardware Implementation of a CNN Digit Recognizer using Basys 3 and ESP8266

This paper presents a lightweight, hardware-accelerated framework for real-time handwritten digit recognition using a Convolutional Neural Network (CNN) deployed on a Basys 3 FPGA board. The system captures user-drawn digits through an ESP8266-powered web interface on a mobile device, which are converted to grayscale 28×28 format before being sent to the FPGA over UART. The CNN core, designed in Verilog using Q1.7 fixed-point arithmetic, performs convolution, ReLU activation, and a fully connected classification stage. The recognized digit is displayed on the Basys 3’s 7-segment display or sent back to the mobile web server. This approach demonstrates the efficient hardware deployment of deep learning models using resource-constrained FPGA platforms without external memory or processors.

Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2025-10-16
DOI
https://doi.org/10.5281/zenodo.17368414
Primary Topic
Advanced Neural Network Applications
Type
article
Field-Weighted Citation Impact
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article

Hardware Implementation of a CNN Digit Recognizer using Basys 3 and ESP8266

Zenodo (CERN European Organization for Nuclear Research)
Advanced Neural Network Applications
article

Hardware Implementation of a CNN Digit Recognizer using Basys 3 and ESP8266

article en

Abstract

This paper presents a lightweight, hardware-accelerated framework for real-time handwritten digit recognition using a Convolutional Neural Network (CNN) deployed on a Basys 3 FPGA board. The system captures user-drawn digits through an ESP8266-powered web interface on a mobile device, which are converted to grayscale 28×28 format before being sent to the FPGA over UART. The CNN core, designed in Verilog using Q1.7 fixed-point arithmetic, performs convolution, ReLU activation, and a fully connected classification stage. The recognized digit is displayed on the Basys 3’s 7-segment display or sent back to the mobile web server. This approach demonstrates the efficient hardware deployment of deep learning models using resource-constrained FPGA platforms without external memory or processors.

Zenodo (CERN European Organization for Nuclear Research)
Openalex Percentile: Top 44%
Advanced Neural Network Applications
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