Exploring Dynamic Sparse Memory Effect Under Varying Transmission States for Digital Predistortion of RF Power Amplifiers

In wideband wireless communication systems, it is particularly crucial to compensate for the memory effect of radio frequency power amplifiers (RFPAs) to ensure optimal system performance. In this work, the representation of the memory effect of RFPAs is comprehensively reviewed first. The concept of the sparse memory effect (SME) of RFPAs is introduced, emphasizing that only a minimal amount of key memory information can achieve excellent performance. According to the SME concept, we further explore the mechanism of the dynamic SME (DSME), which indicates that the characteristics of the SME change with varying transmission states. Through both theoretical analysis and extensive experiments, the DSME of RFPAs is validated, providing compelling evidence for its reasonability. Moreover, the generalization of the DSME is explored to guide predistorter tap selection under unseen transmission states. Second, a novel universal dynamic sparse delay taps switch digital predistortion (DSDTS-DPD) framework is proposed to tackle the nonlinearity of RFPAs under varying transmission states. This model-agnostic architecture, which is implemented by dynamic states mapping module and dynamic delay switching module, is utilized to dynamically capture the memory information, with a minimum number of delay taps. Finally, experimental results further demonstrate the DSME compensation mechanism, as validated with a generalized memory polynomial (GMP) model, provides a superior solution for characterizing the RFPA memory effect than conventional compensation methods, in terms of both modeling accuracy and linearization performance. It also seamlessly integrates with existing dynamic digital predistortion (DPD) neural network models, highlighting robust structure adaptability of the proposed framework to dynamic operational conditions.