DESIGN OF PHOTONIC INTEGRATED CIRCUITS  FOR ANALOG MATRIX TO VECTOR MULTIPLICATION

The article presents a novel and efficient architecture for a photonic integrated circuit (PIC) that performs matrix-vector multiplication using light-based signal processing. This approach leverages the inherent parallelism and ultra-fast propagation speed of photonic systems to execute mathematical operations with unprecedented speed and energy efficiency. The proposed PIC design comprises three functional layers: an input layer, a computational layer, and an output layer. In the input layer, a predefined array of optical waveguides delivers the incoming optical signals representing the vector to be multiplied. These signals propagate toward the second layer, where the computation occurs. The core innovation lies in the computational layer, which features a matrix of optical apertures. Each aperture has a specific area that is proportional to a corresponding coefficient in the matrix. As light passes through these apertures, its intensity is modulated in a way that naturally implements analog multiplication. This physical encoding allows the optical signals to be multiplied by matrix elements without the need for digital electronics or intermediate conversions. The third layer contains a second set of optical waveguides that collect the modulated light and direct it to the output, where the result of the matrix-vector multiplication is formed. This design allows real-time analog computations at the speed of light, significantly outperforming conventional electronic processors in both speed and energy efficiency. A key advantage of this system is its manufacturability. Unlike many photonic systems that require complex and costly photolithographic techniques, this architecture can be fabricated using simpler, low-cost methods, making it accessible for large-scale deployment and integration into current and future optical computing platforms. The paper introduces a mathematical model and software tools for automatic layout generation, enabling rapid prototyping and customization of the photonic circuits for different computational tasks. Use cases include the implementation of Gaussian filters for signal processing, discrete cosine transforms for data compression, and Hopfield neural networks for memory and pattern recognition tasks. Moreover, the article provides a comprehensive analysis of the proposed design, evaluating its benefits such as scalability, speed, and energy savings, alongside limitations like precision control and integration challenges. The proposed architecture demonstrates strong potential for applications in neuromorphic computing, real-time data processing, and future photonic AI accelerators.