64 - BIT Implementation of SPI AMD I2C Protocols Using VERILOG HDL

The Inter-Integrated Circuit (I2C) protocol is a versatile communication standard used in embedded systems and integrated circuits. Two bidirectional lines are present in it: a serial clock line (SCL) and a serial data line (SDA). Its design is master-slave. In order to offer flexibility in data transfer, the number of bytes to be sent or received is chosen using the parameter N. The Serial Peripheral Interface (SPI) protocol, which makes use of a clock gating mechanism, is another efficient communication standard. It enables full-duplex, high-speed data exchange between several slave devices and a master device. Clock gating is a mechanism that selectively enables and disables clock signals to individual blocks or components, hence optimising power consumption. The parameter N is utilised in both SPI and I2C to choose how many bytes are delivered or received. As a result, the number of bytes transported can be varied, and the operation can adapt since data transfer control is handled by a state machine.