An Area and Power Efficient Source Driver IC With Multi-Line Sensing Real-Time Pixel Compensation for OLED Displays
This article proposes a source driver integrated circuit (SD-IC) with a pixel compensator designed to minimize both silicon area and power consumption for organic light-emitting diode (OLED) displays. The proposed SD-IC is capable of driving ultrahigh-definition (UHD) active-matrix OLED (AMOLED) panels with a one-horizontal-time (1-H time) of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$7.2~\mu $</tex-math> </inline-formula>s while supporting a variable refresh rate (VRR). During VRR activation, the compensator senses the characteristics of the driving thin-film transistor (DTFT) and compensates for errors with real-time RGB data. By utilizing external compensation, each pixel adopts a 4T1C structure, which leads to a higher aperture ratio, enhanced luminance efficiency, and improved cost-effectiveness. The compensator integrates a noise reduction dual current conveyor (NDCC) and a dual slope error detector (DSED) to detect active pixel errors while minimizing the impact of panel noise. Additionally, a compensation channel multiplexer (CCM) enables to use a single compensator for sensing and adjusting multiple pixels. The proposed SD-IC was fabricated using a 250-nm CMOS process. After compensation, the maximum current error between two CMOS-modeled thin-film transistors (TFTs) with a 100-mV body-to-source voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\text {BS}}$</tex-math> </inline-formula>) difference was measured as 5.17 LSB, where 1 LSB corresponds to 0.59 nA. Compared to state-of-the-art compensators, the proposed pixel compensator achieves the smallest silicon area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4442.8~{\mu }$</tex-math> </inline-formula>m<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the lowest power consumption of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$13.3~{\mu }$</tex-math> </inline-formula>W per channel.
Institutions
- Korea University (KR)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2025-10-07
- DOI
- https://doi.org/10.1109/jssc.2025.3614134
- Primary Topic
- Medieval Architecture and Archaeology
- Type
- article
- Field-Weighted Citation Impact
- 0.00