A PERFORMANCE ANALYSIS OF EXCLUSIVE OR GATE USING DYNAMIC CMOS GATE LOGIC

Dynamic Pass transistor logic used in the digital circuits to reduce the transistor count, it arises node to get discharged properly, even with the pull-down network OFF during evaluation. An EXOR gate is implemented with the dynamic logic where clock signal is directly accessed the stacking effect circuitry, and it is altered to implement a new design of static CMOS dynamic logic with lower leakage power than older designs that used in nano meter technology the Micro wind 10nm technology used to validate the logic design methods and implementation of pass transistor logic with low input logic An EXOR gate is implemented with the dynamic logic where clock signal is directly accessed the stacking effect circuitry, and it is altered to implement a new design of static CMOS dynamic logic with lower leakage power than older designs that used in nano meter technology the Micro wind 10nm technology used to validate the logic design methods and implementation of pass transistor logic with low input logic.