A 0.35–6-GHz On-Chip Reconfigurable Co-Designed Filtering Low-Noise Amplifier With Improved Tradeoff Among Noise Figure, Anti-Interference Capability, and Flexibility

A reconfigurable co-design filtering low-noise amplifier (F-LNA) with improved noise figure (NF) and anti-interference capability is proposed using 0.15-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m gallium arsenide (GaAs) pseudomorphic high-electron-mobility-transistor (pHEMT) process in this article. With this architecture, the proposed work successfully achieves improved tradeoff among NF, anti-inference capability, and system reconfiguration for sub-6 GHz integrated communication and radar systems and can support dynamic band and mode switching through digital control. With fully reconfigurable working modes and bands, the proposed chip can achieve a full-band gain of 21.1–25.7 dB, an NF of better than 2.2 dB, a stopband rejection of exceeding 25 dBc, and an operational current of below 120 mA, providing a highly integrated and cost-effective solution for integrated communication and radar systems.