Design and Implementation of I2C Bus Controller Based on FPGA

This paper proposes a design scheme of I2C bus controller based on FPGA. The main device (Master) function is implemented by using the hardware description language (Verilog HDL), and it supports standard mode (100kHz) data transmission. The design block diagram and interface signal description of the I2C bus driver module were presented. Finally, the reading and writing of the I2C bus were simulated and verified through Questasim. The read data and write data were compared to prove that the design of the I2C bus driver module was correct. The simulation and measured results show that this design conforms to the I2C timing specification, can stably connect slave devices such as EEPROM and sensors, and has flexibility and scalability.