High-Temperature Buffer Amplifier for Capacitance Load Operation

The paper considers circuit solutions of buffer amplifiers realized on complementary bipolar or field-effect transistors using SiG <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$e$</tex> and silicon-on-insulator technologies, which can provide an increased range of operating temperatures (up to +200…+300°C). The disadvantages of known buffer amplifier schemes and the reasons for their low performance when working with large load capacitances (up to 1 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\boldsymbol{\mu}\mathbf{F})$</tex> are analyzed. A new buffer amplifier circuit is proposed, which minimizes the transient phenomena time (from 10 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\boldsymbol{\mu}\mathbf{s}$</tex> to 2 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\boldsymbol{\mu}\mathbf{s})$</tex> and, accordingly, increases the slew rate (more than 5 times for both polarities of the large-amplitude input pulse signal) by increasing the load capacitor recharge current for negative pulse signals. The efficiency of the considered scheme is confirmed by the results of computer modeling in LTspice environment. It is shown that the considered buffer amplifier surpasses the known analogs in terms of speed when processing both positive and negative pulse signals of large amplitude.