Revising an Open-Source 130nm Analog Standard Cell Library for System Synthesis

A robust tool flow enabling system-level abstraction of digital Integrated Circuit (IC) design has enabled its dominance in modern computing. While analog systems offer superior space and energy efficiency, they lack tools that allow for design automation. An analog standard cell library is a core part of this framework. The existing open-source 130 nm analog standard cell library utilizes Floating Gate (FG) transistors to enable programmability, allowing for reuse of primitive components. However, it contains Design Rule Checking (DRC) errors and lacks verification of cell functionality. This work presents a revision of the previous 130 nm analog standard cell library. Utilizing open-source design software and the Skywater 130nm Process Development Kit (PDK), the revised library resolves DRC errors and adds matching schematics that are verified through simulation.