Digital Implementation of conventional space vector modulation technique using logic gates

This paper explores the sequence of steps involved in the implementation of Logic Gate based Space Vector Modulation (LG-SVM) technique. In case of Space Vector pulse width Modulation technique, the desired voltage vector (magnitude and phase) is used to calculate the sector and dwell timing of the available voltage vectors, and thereafter time-vectors for different sectors are fed to the look-up table, to generate desired switching pulses. The constraints of repeated change in time-vectors with odd and even sectors, programming the look-up table has been replaced by LG-SVM. The delay and pulse timing are calculated directly from the sector value and dwell-time, keeping the odd and even sectors into consideration. K-map is used to reduce the logic combinations. LG-SVM technique is used to drive a 3-phase Induction motor fed through VSI using Power Simulator (PSIM) Software. The simulation results, algorithms and conversion steps are explained and presented.