Extending and Validating High Level Synthesis Tools for Analog Computing on Field Programmable Analog Arrays

Despite the mainstream use of digital computing, analog computing has recently become more relevant due to its significantly greater power efficiency and lower area requirements. However, a lack of synthesis tools and limited programmability leads to an insufficient number of standardized design frameworks for analog systems [1]. This project further develops such a framework by enhancing and validating the tool chain for development on the Field Programmable Analog Array (FPAA). The FPAA is a reconfigurable mixed signal design integrated chip (IC) that utilizes floating gate (FG) technology to create any analog or mixed signal circuit through a Python-based tool chain [2]. The improvements made to the tool chain enable a more streamlined programming flow. Subsequently, a speech feature generator application on the FPAA is developed using this improved tool chain, consisting of a band-pass filter, an envelope detection circuit, and a ladder filter, demonstrating the functionality of the FPAA tool chain and the FPAA’s application for novel analog computing tasks.