Floquet-Assisted SRO Mapping and Metrology for Direct-Gap Engineering with Falsifiability Testing

This record presents an operational workflow that links short-range order (SRO) in semiconductor alloys to device-level behavior. Energy-filtered 4D-STEM with machine learning classifies “atomic neighborhoods” (motifs). We recast those motif maps into a domain-wall field and probe them with a tiny sinusoidal dither on a single process knob. The odd/even demodulated responses yield three compact metrics—B (bulge/latency), L (leakage), and 2f (small-bias curvature)—plus a monotone-onset threshold that together define a falsifiable “containment” plateau (R≈1).Co-registered measurements (e.g., photoluminescence/photoreflectance, Urbach energy, mobility) are analyzed using the same grammar to track valley ordering (Γ, L, X/Δ) and to call true direct↔indirect flips based on energy re-ranking, not just line-broadening. The package includes preregistered falsifiers (flip-only, chirality/B-flip, permutation invariance, leakage controls), a one-page bench card, and practical knobs for tuning SRO and applying tiny elastic strain.An optional back-end “Floquet” drive is provided to reversibly dress bands and stabilize driven plateaus while staying within the same R≈1 logic. The result is a metrology-to-device pipeline that connects atomic motifs to band-edge control with explicit, testable acceptance criteria. Prior art on SRO identification (Science 2025) is complemented by protocol elements documented in Zenodo entries on B, L, 2f thresholds and Floquet plateaus.