Corrections to “Enhancing Memory BIST With an Optimized RTL-BIST IP Core: A Low-Power, High-Fault-Coverage Approach”
In the above article [1], the citation for “March mSR” in Tables VI through Table IX was incorrect. The correct citation should have been [16].
Institutions
- Yuan Ze University (TW)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2025-09-26
- DOI
- https://doi.org/10.1109/tvlsi.2025.3600857
- Primary Topic
- Air Quality and Health Impacts
- Type
- article
- Field-Weighted Citation Impact
- 0.00