A Fast and Efficient Ripple Reduction Technique for a Dual-Phase Asymmetric DC–DC Converters

This article presents a novel, fast, and efficient technique for total current ripple reduction in dual-phase asymmetric dc–dc converters. The proposed method is an entirely software-based technique characterized by its simplicity, very short execution time, and effectiveness in minimizing ripple without requiring sensors. It also demonstrates robustness against variations in load, voltage, parameter changes, and differences in phase inductance. The method relies on a region-based, single-variable, linear functions approach to determine the optimal phase shift using only the duty cycle values, eliminating the need for real-time measurements. The proposed method is validated through experimental tests on a two-phase converter with the same input but supplying different loads at different voltages. The results demonstrate a very fast execution time of 1.8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mathrm{\mu }$</tex-math></inline-formula>s using the TMS320F28379D and a ripple reduction of up to 44.11% compared to standard symmetrical interleaving, proving its effectiveness for real-time and real-world applications.