LATTE: A Decoding Architecture for Quantum Computing with Temporal and Spatial Scalability

Quantum error correction allows inherently noisy quantum devices to emulate an ideal quantum computer with reasonable resource overhead. As a crucial component, decoding architectures have received significant attention recently. In this paper, we introduce LATTE, a FPGA-CPU hybrid decoding architecture aiming to address the key requirements of scaling up in lattice surgery quantum computation -- Latency, Accuracy, Throughput and Transmission Bandwidth, in an Eclectic manner. LATTE follows a hierarchical design: (1) A fully streaming and asynchronous block decoding system on CPU to enable parallelization both temporally and spatially. (2) A super-light yet accurate neural local decoding unit integrated with quantum control hardware on FPGA, which remains \emph{transparent} to the block decoding system, effectively reducing transmission bandwidth and accelerating the decoding process. LATTE delivers accuracy on par with the base decoder while achieving real-time decoding throughput and significantly reducing both bandwidth requirements and computational resources, enabling a level of scalability far beyond previous approaches. Under circuit-level noise $p=0.001$, LATTE achieves over $\mathbf{90\%}$ reduction in transmission bandwidth and a $\mathbf{6.4\times}$ speedup on average in single-block decoding. In the \emph{streaming decoding} scenario: (1) LATTE achieves constant and low latency ($\mathbf{16\times}$-$\mathbf{20\times}$ speedup over existing streaming decoding implementations) in arbitrarily long quantum memory experiments, with near-optimal resources -- merely $\mathbf{2}$ threads are sufficient for decoding the surface code with distance up to $17$. (2) LATTE minimizes latency in multi-patch measurement experiments through highly parallelized decoding operations. These combined efforts ensure sufficient scalability for large-scale fault-tolerant quantum computing.