Modeling Dynamic Microarchitectural Power Consumption Using Performance Monitoring Counters

The Information and Communication Technology (ICT) sector contributes significantly to global electricity consumption and associated greenhouse gas emissions, and are expected to increase with increasing digitalization worldwide. Optimizing software for energy efficiency is thus critical. However, the tools currently available for measuring software power consumptionlack granularity, and are not able to provide actionable insights for targeted optimization. This thesis aims to bridge the existing gap by introducing a microarchitectural dynamic powermodel that links dynamic energy consumption to specific hardware-level events captured via Performance Monitoring Counters. To achieve this, custom microbenchmarks were designed to isolate and measure the energy impact of various events, including cache hits and misses, branch mispredictions, and executed micro-operations. Based on the data collected, a linearmodel was constructed to ensure both interpretability and practical utility. Validation using real-world workloads demonstrated the model's capability to accurately predict power consumption with a only a few deviations and highlighted significant contributions from executed micro-operations, L1 cache hits and uncore memory writes. These insights provid eguidance for software developers that seek to optimize energy efficiency at the microarchitectural level.