74‐2: Ultra‐High Output Current of Oxide Vertical TFTs Using a‐IGZO by Sputter

The vertical channel structure thin film transistors (V‐TFTs) have caused the widespread attention to achieve high output current and small footprint simultaneously. To establish the vertical channel architecture, it is critical to control dry etch process of spacer between source and drain layer. In this work, the taper angle of spacer shows approximately 70 to 85° by optimizing the photo and dry process, which is the base layer of the semiconductor channel. By adopting the plasma treatment, the device equivalent mobility is above 80 cm2/Vs with channel length 0.5um. Besides, the △Vth under the positive bias stress of 20V and negative bias temperature illumination stress of ‐20V for 1 h is +0.49V and ‐1.69V, respectively. The 4inch 90 x 100 (x RGB) mini‐LED display driven by a‐IGZO V‐TFTs has demonstrated.