P‐8: <i>Distinguished Poster:</i> 4, 032‐PPI Vth Compensation Pixel Circuit for OLEDoS

In this paper, a 7T1C pixel circuit for 4, 032‐PPI is proposed In order to implement organic light emitting diode‐on silicon (OLEDoS) for high‐resolution micro‐display, pixels must be integrated in a small area However, in the case of a small transistor, a driving transistor current deviation occurs due to Vth variation, and image quality is deteriorated The proposed 7T1C pixel minimizes the current deviation of the driving transistor through the Vth compensation circuit. In addition, the source and body voltages of the driving transistor were the same so that there was no body effect of the CMOS circuit In order to implement 4K resolution, verification was performed by designing the pixel layout in a 6.3um pixel pitch using an 8 V transistor. As a result, the current deviation is improved from ±10.6% to ±2.75% when ±15mV Vth deviation of transistor is applied

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Publication Details

Journal
SID Symposium Digest of Technical Papers
Published
2025-06-01
DOI
https://doi.org/10.1002/sdtp.18457
Primary Topic
Geochemistry and Geologic Mapping
Type
article
Field-Weighted Citation Impact
0.00
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article

P‐8: Distinguished Poster: 4, 032‐PPI Vth Compensation Pixel Circuit for OLEDoS

SID Symposium Digest of Technical Papers
Geochemistry and Geologic Mapping
article

P‐8: Distinguished Poster: 4, 032‐PPI Vth Compensation Pixel Circuit for OLEDoS

article en

Abstract

In this paper, a 7T1C pixel circuit for 4, 032‐PPI is proposed In order to implement organic light emitting diode‐on silicon (OLEDoS) for high‐resolution micro‐display, pixels must be integrated in a small area However, in the case of a small transistor, a driving transistor current deviation occurs due to Vth variation, and image quality is deteriorated The proposed 7T1C pixel minimizes the current deviation of the driving transistor through the Vth compensation circuit. In addition, the source and body voltages of the driving transistor were the same so that there was no body effect of the CMOS circuit In order to implement 4K resolution, verification was performed by designing the pixel layout in a 6.3um pixel pitch using an 8 V transistor. As a result, the current deviation is improved from ±10.6% to ±2.75% when ±15mV Vth deviation of transistor is applied

SID Symposium Digest of Technical PapersVol. 56(1)
Samsung (South Korea) (KR)
Affordable and clean energy
Openalex Percentile: Top 71%
Geochemistry and Geologic Mapping
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