A High-Density 3-D Capacitor Using Through Glass Via Structure

Glass substrates offer excellent properties for high-density package applications due to their low coefficient of thermal expansion, nanometer-scale surface flatness, and minimal dielectric loss. These characteristics make glass substrates well-suited for integrated passive devices. This study presents a high-density 3D via capacitor embedded in a glass substrate. The through-hole glass vias (TGVs) are conformally lined with a TiN/HfO2/TiN stack, using processes that are fully compatible with standard TGV fabrication techniques. The fabricated device exhibited an aspect ratio of 16:1 and achieved a measured capacitance of up to 9.7 nF within a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$275~\mu $ </tex-math></inline-formula>m <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 220~\mu $ </tex-math></inline-formula>m area, corresponding to a capacitance density of 160.33 nF/mm2. Measured electrical performance included an ESR of 237 m <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> and a breakdown voltage of 6.31 ± 0.5 V, demonstrating its suitability for decoupling and power integrity applications.