Reimagining Semiconductor Development: Machine Learning Applications from Device Physics to System Architectures: Survey Paper

The paper examines semiconductor development by evaluating the shift from conventional methods to data-based and machine-learning approaches. ITRS 2.0 presents an advanced pathway which enlarges semiconductors for contemporary marketplace needs by including application-oriented improvements and specific industry demands above Moore’s Law. Performance evaluation of FinFET technology takes place at the 16-nm node by identifying key variation contributors while introducing adaptive approaches. Research analyzes the consequences of FinFET performance at the 16-nm node and demonstrates how deep learning works in computer vision and why machine learning became quick and widespread in both semiconductor production and design processes. The research examines how Graph Neural Networks improve EDA workflows through the presentation of cutting-edge machine learning methods for device performance evaluation as well as IR drop prediction and chip architecture optimization strategies across PVT ranges. This paper examines non-Von Neumann computing as well as energy-efficient accelerators for AI applications while assessing the move towards smart scalable and power-efficient semiconductor solutions.

Publication Details

Journal
Umsida Repository (Universitas Muhammadiyah Sidoarjo)
Published
2025-05-01
Primary Topic
VLSI and FPGA Design Techniques
Type
article
Field-Weighted Citation Impact
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article

Reimagining Semiconductor Development: Machine Learning Applications from Device Physics to System Architectures: Survey Paper

Umsida Repository (Universitas Muhammadiyah Sidoarjo)
VLSI and FPGA Design Techniques
article

Reimagining Semiconductor Development: Machine Learning Applications from Device Physics to System Architectures: Survey Paper

article en

Abstract

The paper examines semiconductor development by evaluating the shift from conventional methods to data-based and machine-learning approaches. ITRS 2.0 presents an advanced pathway which enlarges semiconductors for contemporary marketplace needs by including application-oriented improvements and specific industry demands above Moore’s Law. Performance evaluation of FinFET technology takes place at the 16-nm node by identifying key variation contributors while introducing adaptive approaches. Research analyzes the consequences of FinFET performance at the 16-nm node and demonstrates how deep learning works in computer vision and why machine learning became quick and widespread in both semiconductor production and design processes. The research examines how Graph Neural Networks improve EDA workflows through the presentation of cutting-edge machine learning methods for device performance evaluation as well as IR drop prediction and chip architecture optimization strategies across PVT ranges. This paper examines non-Von Neumann computing as well as energy-efficient accelerators for AI applications while assessing the move towards smart scalable and power-efficient semiconductor solutions.

Umsida Repository (Universitas Muhammadiyah Sidoarjo)
Openalex Percentile: Top 50%
VLSI and FPGA Design Techniques
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Reimagining Semiconductor Development: Machine Learning Applications from Device Physics to System Architectures: Survey Paper · Umsida Repository (Universitas Muhammadiyah Sidoarjo) (2025) | TGRS Research Map | TGRS