Geoptimaliseerde dynamische geheugenbeheertechnieken op heterogene geheugensystemen

Memory management in recent systems refers to the process of controlling, coordinating, and organizing computing platforms main memory resources. The primary and major goal of memory management is to provide efficient and effective utilization of the computing platforms memory, enabling programs and data to be stored, accessed, and manipulated through a systematic process. However, the advances in processing, memory and interconnection technologies over the last decade keep increasing the disparity of performance among the diverse processing cores, e.g. Compute Processing Units (CPUs), Graphics Processing Units (GPUs), RISC-V and ARM cores and Tensor Processing Units (TPUs) andthememorytechnologiesandinterconnectionprotocols, knownasthe'Memory Wall' and the 'Interconnection Wall'. Furthermore, in addition the ever-increasing amount and dynamicity of data produced, alongside with the integration of emerging memory technologies compose a complex heterogeneous paradigm. In this context, dynamic memory management plays a significant role in modern computing systems, allowing efficient allocation and deallocation of memory resources at runtime. In the state-of-the-art, dynamic memory management encompasses a variety of techniques and algorithms aimed at optimizing memory usage and improving overall system performance, sustainability and hardware wear. Aiming to satisfy the aforementioned criteria, dynamic memory management solutions require an effective co-design of multiple components of the hierarchy of the computing continuum, i.e. varying from application level to hardware-based solutions. In this dissertation we examine the applicability of dynamic memory management techniques over distinct levels across the hardware-software continuum, aiming to provide performance, energy, and memory resources Pareto-tradeoff optimizations. More specifically, the novel contributions of this thesis focus on the following optimization levels: i) application-level optimizations, ii) OS support, libraries and placement optimizations, and iii) hardware-level mapping optimizations. Given the inseparable and strong relationship between hardware and software memory components, we aim to enhance the interoperability of different optimization layers and provide an end-to-end workflow and methodology. In summary, the major contributions of this PhD thesis are the following: (i) we present an extensive analysis, classification and we provide guidelines for data placement design for heterogeneous memory systems, (ii) we propose a novel solution for applying source-to-source transformations for Python applications aiming to support memory footprint optimization, leveraging a set of static (offline) and dynamic (online) analysis optimizations, (iii) we design a dynamic data structure refinement, exploration and placement solution over heterogeneous DRAM/NVM Memory systems aiming to optimize and derive trade-offs among performance, energy consumption, and hardware wear and (iv) we propose near-hardware page placement solution which relies on LSTMs and the boosting of dynamic memory management through effective cache configuration.