Secure interface architecture for the software defined system on wafer

To address the lack of dynamic and heterologous characteristics for interconnect interface in software defined system on wafer, a dynamic heterologous redundancy secure interface (DHR-SI) architecture was proposed to maximize the reuse of functional logic. First, based on software defined interconnect technology, the heterogeneous characteristics were implemented in terms of circuit structure, transmission protocol, and message content. And then an arbitration scheduling mechanism was designed to achieve threat localization and dynamic reconfiguration. Finally, the architecture was validated and tested through a wafer scale chiplet. The experimental analysis shows that the proposed DHR-SI architecture has excellent threat detection, localization, and dynamic defense capabilities with limited overhead.