Tillvägagångssätt för att accelerera videoströämning med låg latens : En analys av ett videoströmningssystem

This thesis investigates methods for achieving low-latency video streaming using commercially available System-on-Chip (SoC) platforms equipped with specialized hardware accelerators. The study evaluates a video distribution system (VDS) where video data is transmitted over Ethernet from a Texas Instruments SK-AM69 (sender) to an NVIDIA JetsonOrin Nano Super (receiver). The primary focus is reducing glass-to-glass latency (the time from capturing a video frame to its display) through pipeline optimizations using the GStreamer multimedia framework. A series of pipelines were constructed using hardware-accelerated elements for encoding, color conversion, and image signal processing. The pipelines were designed to address key optimization strategies such as parallelism through frame splitting, increased display frame rate, and pipeline multithreading. Latency was measured using GStreamer tracers and a custom glass-to-glass testing setup involving LED and photodetector instrumentation. Further, a theoretical model was developed to analyze latency distributions and validate empirical measurements. The results demonstrate that, with proper configuration and hardware utilization, modern SoC platforms can meet the demands of real-time video streaming applications. The study also highlights the importance of synchronization between independently clocked components and models the variance introduced by processing stages. These findings contribute practical insights into designing embedded video systems with strict latency requirements.