Advanced methodologies for verification of systems-on-chip involved in satellite applications

In recent years, unprecedented technological advancements in electronics have enabled increasingly powerful boards and components, allowing for progressively higher data processing speeds. This trend has also been mirrored in space electronics, where more complex systems are being developed and integrated onboard satellites. Specifically, both inter-unit communications within satellites and data processing systems have reached speeds previously unseen, theoretically up to several tens of Gigabits per second. Unfortunately, this progress has not extended to the methodologies used to test these systems, thereby posing a potential risk to onboard operations and, in some cases, to the entire mission. Verification and validation phases for digital systems in satellite telecommunications are often underestimated and incompletely executed, primarily due to high engineering costs that are difficult to amortize given the low production volume. This thesis aims to address this gap by proposing effective and highly flexible strategies for both functional verification and hardware validation of complex systems, specifically targeting satellite communications applications. For functional verification, the proposed strategy focuses on the development of advanced, automated verification environments following the Universal Verification Methodology (UVM) framework, currently the state-of-the-art standard for this application. Specifically, software models known as Digital Twins are proposed for integration into the verification environments to emulate the ideal behavior of a real system. This solution offers high flexibility and simplifies and automates the verification flow: the Digital Twin can produce the expected behavior of the system under test, allowing for comparison with the real system’s output. Additionally, it can facilitate data transmission and reception by establishing direct communication with the design under verification. This approach was applied in verification campaigns for various highly complex systems used in different applications, covering onboard satellite communication (SpaceWire protocol) and data processing for ground transmission, supporting both optical and radio-frequency communications (encoding and modulation systems compliant with CCSDS 131.2-B and CCSDS 142.0-B standards). This served as a demonstration of the effectiveness and flexibility of this methodology, proving its applicability to the space sector. The second part of the thesis presents a validation strategy for systems capable of generating data at several Gigabits per second after their implementation on hardware boards, again focusing on satellite applications. This strategy demonstrates how, by equipping the system under validation with high-speed interfaces and using Electrical Ground Support Equipment (EGSE), it is possible to test the system without limiting performance or losing data. To validate the data produced by the system under test, Digital Twins are proposed once more, which can generate the expected data outputs. Two validation campaigns based on this strategy are presented for two very different systems: the first is a demonstrator consisting of a chain of three electronic boards that act respectively as a transmitter, communication channel emulator, and receiver. This setup is used to evaluate the performance of the CCSDS 131.2-B protocol, defined for satellite-to-ground data transmission, based on configurable characteristics of orbit, satellite, and communication channel. This protocol is particularly relevant for Earth observation missions, especially the European Space Agency’s Copernicus missions. The second system is an optical Encoder and Modulator compliant with the CCSDS 142.0-B standard, which defines two distinct processing protocols: High Photon Efficiency (HPE) and Optical-On-Off Keying (O3K). These protocols achieve transmission speeds of up to 8 and 10 Gigabits per second, respectively. The research presented in this thesis was conducted in collaboration with IngeniArs S.r.l. as part of the Industrial Doctorate, with the aim of developing advanced methodologies for verifying digital designs used in satellite applications. The ultimate objective of this manuscript is to demonstrate the potential, applicability, and sustainability of the proposed methodologies within industrial projects.

Publication Details

Journal
Electronic Theses and Dissertations Repository (University of Pisa)
Published
2025-02-22
Primary Topic
Spacecraft Design and Technology
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article

Advanced methodologies for verification of systems-on-chip involved in satellite applications

Electronic Theses and Dissertations Repository (University of Pisa)
Spacecraft Design and Technology
article

Advanced methodologies for verification of systems-on-chip involved in satellite applications

article en

Abstract

In recent years, unprecedented technological advancements in electronics have enabled increasingly powerful boards and components, allowing for progressively higher data processing speeds. This trend has also been mirrored in space electronics, where more complex systems are being developed and integrated onboard satellites. Specifically, both inter-unit communications within satellites and data processing systems have reached speeds previously unseen, theoretically up to several tens of Gigabits per second. Unfortunately, this progress has not extended to the methodologies used to test these systems, thereby posing a potential risk to onboard operations and, in some cases, to the entire mission. Verification and validation phases for digital systems in satellite telecommunications are often underestimated and incompletely executed, primarily due to high engineering costs that are difficult to amortize given the low production volume. This thesis aims to address this gap by proposing effective and highly flexible strategies for both functional verification and hardware validation of complex systems, specifically targeting satellite communications applications. For functional verification, the proposed strategy focuses on the development of advanced, automated verification environments following the Universal Verification Methodology (UVM) framework, currently the state-of-the-art standard for this application. Specifically, software models known as Digital Twins are proposed for integration into the verification environments to emulate the ideal behavior of a real system. This solution offers high flexibility and simplifies and automates the verification flow: the Digital Twin can produce the expected behavior of the system under test, allowing for comparison with the real system’s output. Additionally, it can facilitate data transmission and reception by establishing direct communication with the design under verification. This approach was applied in verification campaigns for various highly complex systems used in different applications, covering onboard satellite communication (SpaceWire protocol) and data processing for ground transmission, supporting both optical and radio-frequency communications (encoding and modulation systems compliant with CCSDS 131.2-B and CCSDS 142.0-B standards). This served as a demonstration of the effectiveness and flexibility of this methodology, proving its applicability to the space sector. The second part of the thesis presents a validation strategy for systems capable of generating data at several Gigabits per second after their implementation on hardware boards, again focusing on satellite applications. This strategy demonstrates how, by equipping the system under validation with high-speed interfaces and using Electrical Ground Support Equipment (EGSE), it is possible to test the system without limiting performance or losing data. To validate the data produced by the system under test, Digital Twins are proposed once more, which can generate the expected data outputs. Two validation campaigns based on this strategy are presented for two very different systems: the first is a demonstrator consisting of a chain of three electronic boards that act respectively as a transmitter, communication channel emulator, and receiver. This setup is used to evaluate the performance of the CCSDS 131.2-B protocol, defined for satellite-to-ground data transmission, based on configurable characteristics of orbit, satellite, and communication channel. This protocol is particularly relevant for Earth observation missions, especially the European Space Agency’s Copernicus missions. The second system is an optical Encoder and Modulator compliant with the CCSDS 142.0-B standard, which defines two distinct processing protocols: High Photon Efficiency (HPE) and Optical-On-Off Keying (O3K). These protocols achieve transmission speeds of up to 8 and 10 Gigabits per second, respectively. The research presented in this thesis was conducted in collaboration with IngeniArs S.r.l. as part of the Industrial Doctorate, with the aim of developing advanced methodologies for verifying digital designs used in satellite applications. The ultimate objective of this manuscript is to demonstrate the potential, applicability, and sustainability of the proposed methodologies within industrial projects.

Electronic Theses and Dissertations Repository (University of Pisa)
Industry, innovation and infrastructure
Openalex Percentile: Top 37%
Spacecraft Design and Technology
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