An Ultra-Low-Power, Area-Efficient All-Analog Trojan with Temporal Power Supply Triggering

With the rapid expansion of the Internet of Things and rising concerns over intellectual property protection, hardware security has become increasingly vital—particularly in defending against hardware trojans. While much of the existing research targets digital trojans, analog hardware trojans remain largely unexplored, presenting unique opportunities for developing innovative attack vectors and mitigation strategies. This thesis introduces a novel all-analog temporal trojan that functions entirely within the analog domain. The design incorporates power supply noise detection and charge-accumulator techniques to enable precise control over attack execution and payload delivery. It also leverages novel circuit techniques to reduce power and area overhead, enhance concealment, and increase resilience to process variations and accidental triggering. The system is implemented in a 55 nm CMOS process and validated through simulation, physical layout, and silicon fabrication, with post-silicon testing and mitigation studies planned. The functionality of the Trojan is demonstrated within an analog front-end for ECG-based biometric authentication, showcasing its potential to corrupt analog data streams while evading standard detection methods. The goal of the trojan is two-fold: to demonstrate the wide-reaching and disruptive potential of analog trojans, and to motivate the development of robust defenses against such stealthy and persistent threats.