GNU Compiler Collections automatiska vektorisering för RISC-V med vektortillägg 1.0 : En jämförande studie mot x86-64 AVX2

As edge computing becomes an increasingly more relevant complement to cloud computing, reduced complexity instruction set architectures such as RISC-V can perform well in edge devices’ resource-limited environments. Leveraging single instruction, multiple data (SIMD) principles is essential to speed up processing while retaining a low power increase. While RISC-V’s Vector Extension was ratified in 2021, broad compiler support is still new. To fully leverage SIMD extensions, efficient compilers are needed. One broadly recognized compiler is the GNU Compiler Collection (GCC). The purpose of this paper is to compare GCC-generated binaries from the same test suite. The Test Suite for Vectorizing Compilers 2 (TSVC2) codebase was used to target both RISC-V with the vector extension (RVV) and x86-64 with Advanced Vector Extensions 2 (AVX2) in terms of dynamic instruction count and ratio of vectorized functions. This comparison provides statistics that highlight some efficiencies and inefficiencies that exist in the current auto-vectorization implementation for RVV. This is done by running the binaries through software that collects dynamic information from the runtime of the binaries, together with a static analysis of the compiler vectorization output. The gem5 simulator is used for RISC-V and Intel Advisor is used for running the binary on x86-64. The collected statistics are then summarized and analyzed. Results show that RVV vectorized 96/151 tests, versus 77/151 for AVX2, which is a 24.7% increase. RVV also achieved a 61% decrease in dynamic instruction count compared to 48% for AVX2, driven largely by loops with conditional control flow. The one scenario where RVV underperformed compared to AVX2 was in early loop exiting conditions. These findings show that GCC’s RVV backend largely outperforms its AVX2 counterpart in the TSVC2 benchmark, except in early loop exiting conditions.