Design of Low‐Power, High‐Precision, and Lightweight Image Recognition System for Multiple Scenes

Aiming at the existing handwritten digit recognition systems with low recognition accuracy, high system power consumption, and high hardware resource consumption, this paper proposes a low‐power, high‐precision, and lightweight handwritten digit recognition hardware acceleration scheme for multiscenario based on FPGA. By optimizing the network structure of a convolutional neural network (CNN) and the number of parameters of the model, this scheme proposes a high‐precision and lightweight network model, simplified CNN, and by optimizing the data access mode and memory usage, and by adopting the strategies of time‐sharing and multiplexing, weights sharing, and parallel processing for the hardware acceleration of the algorithm, it effectively reduces the consumption of hardware resources and improves the performance of the system. The experimental results show that the recognition accuracy of the algorithm reaches 98.82%, the system response time is 0.481316 ms under the 33 + 200 MHz system clock, and the on‐chip power consumption of the system is 0.843 W, and it can be used for real‐time handwritten digit recognition in many occasions.

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Publication Details

Journal
Active and Passive Electronic Components
Published
2025-01-01
DOI
https://doi.org/10.1155/apec/2070758
Primary Topic
Wheat and Barley Genetics and Pathology
Type
article
Field-Weighted Citation Impact
0.00

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article

Design of Low‐Power, High‐Precision, and Lightweight Image Recognition System for Multiple Scenes

Active and Passive Electronic Components
Wheat and Barley Genetics and Pathology
article

Design of Low‐Power, High‐Precision, and Lightweight Image Recognition System for Multiple Scenes

article en

Abstract

Aiming at the existing handwritten digit recognition systems with low recognition accuracy, high system power consumption, and high hardware resource consumption, this paper proposes a low‐power, high‐precision, and lightweight handwritten digit recognition hardware acceleration scheme for multiscenario based on FPGA. By optimizing the network structure of a convolutional neural network (CNN) and the number of parameters of the model, this scheme proposes a high‐precision and lightweight network model, simplified CNN, and by optimizing the data access mode and memory usage, and by adopting the strategies of time‐sharing and multiplexing, weights sharing, and parallel processing for the hardware acceleration of the algorithm, it effectively reduces the consumption of hardware resources and improves the performance of the system. The experimental results show that the recognition accuracy of the algorithm reaches 98.82%, the system response time is 0.481316 ms under the 33 + 200 MHz system clock, and the on‐chip power consumption of the system is 0.843 W, and it can be used for real‐time handwritten digit recognition in many occasions.

Active and Passive Electronic ComponentsVol. 2025(1)
Beijing University of Posts and Telecommunications (CN), Peking University (CN), Xiamen University of Technology (CN)
National Natural Science Foundation of China, Natural Science Foundation of Fujian Province, National Key Research and Development Program of China
Decent work and economic growth
Openalex Percentile: Top 40%
Wheat and Barley Genetics and Pathology
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Design of Low‐Power, High‐Precision, and Lightweight Image Recognition System for Multiple Scenes · Active and Passive Electronic Components (2025) | TGRS Research Map | TGRS