1 μA Quiescent All-MOS Subthreshold Design Technique of Voltage Reference for Biomedical and IoT Device Applications

Novel low-voltage, low-power voltage reference circuit is introduced, capable of functioning down to 350m V with a power consumption of 6.2n W (with a quiescent current of 4.3nA) at room temperature. Implemented in a 65nm process node, the circuit utilizes a topology in the weak inversion region of transistors. Although weak inversion operation is sensitive to temperature and process variability, the circuit employs compensation techniques ensuring independence from process, voltage, and temperature variations. Simulation results using Monte Carlo Analysis shows that VT<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</inf> dependence can be reduced to less than ± 1 % (3σ) and with minimum PSRR of 50.52 dB and 56.19 dB at 100Hz and 10MHz respectively. Furthermore since it is a resistor-less voltage reference, it only consumes a very small die area which is advantageous in biomedical and portable applications.