Design and development of SHINE accelerator fast interlock system

BackgroundShanghai HIgh repetitioN rate XFEL and Extreme light facility (SHINE) is a large-scale scientific facility under construction in China. Due to 1 MHz repetition rate and thousands of kilometers length of SHINE, the accelerator interlock system should be a large system with response speed in microsecond magnitude and capable of processing tens of thousands of signals simultaneously.PurposeThis study aims to design and implement fast interlock system integrated with the conventional slow interlock system for SHINE accelerator.MethodThrough the analysis of SHINE requirements, FPGA (Field Programmable Gate Array) technology, distributed control technology, and network communication technology were adopted to complete the design of the fast interlock system. The integration of fast interlock system and slow interlock system on the same platform was achieved through programmable control technology and interface program development. The interface development software for the control system was designed and developed using PyDM, and the massive data exchange between large-scale interlock system was solved by using FL-net technology. Finally, based on Experimental Physics and Industrial Control System (EPICS), the design of operation mode, system architecture and data transmission were implemented and deployed.ResultsThe accelerator interlocking system developed in this study enables data exchange and expansion between fast and slow interlocks, as well as between any station. The average response time for multiple sites connected by a 1 m cable is 903.32 ns, and the average response time for multiple sites connected by an 800 m cable is 5.33 µs.ConclusionsAll the functions of fast interlock system are implemented and verified, and the system have been put into online operation for SHINE injector. The response time test results meet the SHINE operation requirements, and remote control of the system has been implemented based on the EPICS.