Data-Pattern-Driven LUT for Efficient In-Cache Computing in CNNs Acceleration

The lookup table (LUT)-based Processing-in-Memory (PIM) solutions perform computations by looking up precomputed results stored in LUTs, providing exceptional efficiency for complex operations such as multiplication, making them highly suitable for energy- and latency-efficient Convolutional Neural Network (CNN) inference tasks. However, including all possible results in the LUT naively demands exponential hardware resources, significantly limiting parallelism and increasing hardware area, latency, and power overhead. While decomposition and compression techniques can reduce the LUT size, they also introduce considerable memory access overhead and additional operations. To address these challenges, we conduct an extensive analysis to identify which data portions significantly impact accuracy in CNNs. Based on the insight that key data is concentrated in a small range, we propose a data-pattern-driven (DPD) optimization strategy, which approximates less critical data to drastically reduce LUT size while preserving computational efficiency with acceptable accuracy loss.

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Publication Details

Journal
IEEE Computer Architecture Letters
Published
2025-01-01
DOI
https://doi.org/10.1109/lca.2025.3548080
Primary Topic
Plant pathogens and resistance mechanisms
Type
article
Field-Weighted Citation Impact
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article

Data-Pattern-Driven LUT for Efficient In-Cache Computing in CNNs Acceleration

IEEE Computer Architecture Letters
Plant pathogens and resistance mechanisms
article

Data-Pattern-Driven LUT for Efficient In-Cache Computing in CNNs Acceleration

article en

Abstract

The lookup table (LUT)-based Processing-in-Memory (PIM) solutions perform computations by looking up precomputed results stored in LUTs, providing exceptional efficiency for complex operations such as multiplication, making them highly suitable for energy- and latency-efficient Convolutional Neural Network (CNN) inference tasks. However, including all possible results in the LUT naively demands exponential hardware resources, significantly limiting parallelism and increasing hardware area, latency, and power overhead. While decomposition and compression techniques can reduce the LUT size, they also introduce considerable memory access overhead and additional operations. To address these challenges, we conduct an extensive analysis to identify which data portions significantly impact accuracy in CNNs. Based on the insight that key data is concentrated in a small range, we propose a data-pattern-driven (DPD) optimization strategy, which approximates less critical data to drastically reduce LUT size while preserving computational efficiency with acceptable accuracy loss.

IEEE Computer Architecture LettersVol. 24(1)
Kyushu University (JP)
Affordable and clean energy
Openalex Percentile: Top 41%
Plant pathogens and resistance mechanisms
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Data-Pattern-Driven LUT for Efficient In-Cache Computing in CNNs Acceleration · IEEE Computer Architecture Letters (2025) | TGRS Research Map | TGRS