Janus Electronic\nDevices with Ultrathin High‑κ\nGate Dielectric Directly Integrated on 1T′-MoTe<sub>2</sub>

Integrating high-quality dielectrics with two-dimensional\n(2D)\ntransition metal chalcogenides (TMDCs) is crucial for high-performance\nelectronics. However, the lack of dangling bonds on 2D material surfaces\ncomplicates direct dielectric deposition. We propose using atomic\nlayer deposition (ALD) to integrate ultrathin high-κ dielectric\ndirectly on 1T′-MoTe<sub>2</sub> surfaces, facilitating the\ncreation of high-performance back-gated field-effect transistors (FETs).\nExploiting 1T′-MoTe<sub>2</sub>’s natural oxidation\nin ambient conditions, we directly deposit dense and uniform HfO<sub>2</sub> dielectric films below 5 nm, achieving an equivalent oxide\nthickness (EOT) of 0.97 nm. The resulting back-gate transistors, with\na monolayer MoSSe on HfO<sub>2</sub>/1T′-MoTe<sub>2</sub>,\nshow a current on/off ratio over 10<sup>5</sup> and operate at low\nvoltages (<1 V), indicating high gating efficiency and a charge\ncarrier mobility of 2.93 cm<sup>2</sup>V<sup>–1</sup>s<sup>–1</sup>. Additionally, we demonstrate a 6 × 5 bottom-gated\narray of MoSSe transistors using all-1T′-MoTe<sub>2</sub> electrodes,\nachieving an 86.7% sample yield. Our approach also enables the creation\nof various integrated logic circuits such as inverters, NAND, and\nNOR gates. This research offers a feasible method for integrating\nhigh-κ dielectric films using industrially compatible ALD processes,\nproviding excellent thickness control, uniformity, and scalability\nfor 2D electronic devices.