Design of MUX Based Circuit for Half Adder and Half Subtractor
This study delves into crafting a circuit that seamlessly performs both half addition and half subtraction. Leveraging two 2:1 Multiplexers, an XOR gate, and NOT gates, the design achieves dual functionalities while optimizing component usage. A control signal dictates the operational mode, ensuring adaptability with a straightforward assembly of common components. While this integrated circuit offers a compact and versatile solution for fundamental arithmetic operations, it's primarily suited for single-bit tasks and necessitates an extra control signal.
Publication Details
- Journal
- Zenodo (CERN European Organization for Nuclear Research)
- Published
- 2024-09-09
- DOI
- https://doi.org/10.5281/zenodo.13735539
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.00