A high-precision amplifier using ping-pong auto-zeroing

This paper presents the design and implementation of a low-offset, high-gain operational amplifier (op-amp). The overall circuit consists of a bandgap reference, oscillator, frequency divider, auxiliary op-amp, and main op-amp. By employing a ping-pong auto-zeroing architecture, the circuit achieves continuous operation while significantly reducing the input offset voltage of the amplifier. Furthermore, this paper proposes a novel and efficient control timing scheme that effectively reduces the settling time during ping-pong switching at a relatively low cost, further minimizing the output glitches of the amplifier. The amplifier chip was designed and fabricated in a 350 nm CMOS process. Measurement results demonstrate that under a 5 V supply voltage, the amplifier consumes 0.65 mA current, achieves a maximum input offset voltage of 3 µV, provides a gain-bandwidth product of 8 MHz, and exhibits a noise spectral density as low as 30 nV/√Hz.