Tracking\nCharge Carrier\nPaths in Freestanding GaN/AlN\nNanowires on Si(111)

Functional and abundant\nsubstrate materials are relevant\nfor applying\nall sophisticated semiconductor-based device components such as nanowire\narrays. In the case of GaN nanowires grown by metalorganic vapor phase\nepitaxy, Si(111) substrates are widely used, together with an AlN\ninterlayer to suppress the well-known Ga-based melt-back-etching.\nHowever, the AlN interlayer can degrade the interfacial conductivity\nof the Si(111) substrate. To reveal the possible impact of this interlayer\non the overall electrical performance, an advanced analysis of the\nelectrical behavior with suitable spatial resolution is essential.\nFor the electrical investigation of the nanowire-to-substrate junction,\nwe used a four-point probe measurement setup with sufficiently high\nspatial resolution. The charge separation behavior of the junction\nis also demonstrated by an electron beam-induced current mode, while\nthe n-GaN nanowire (NW) core exhibits good electrical conductivity.\nThe charge carrier-selective transport at the NW-to-substrate junction\ncan be attributed to different, local material compositions by two\nmain effects: the reduction of Ga adatoms by shadowing of the lower\npart of the NW structure by the top part during growth, i.e. the protection\nof the pedestal footprint from Ga adsorption. Our combination of investigation\nmethods provides direct insight into the nanowire-to-substrate junction\nand leads to a model of the conductivity channels at the nanowire\nbase. This knowledge is crucial for all future GaN bottom-up grown\nnanowire structure devices on conductive Si(111) substrates.