Enhancing Uniformity,\nRead Voltage Margin, and Retention\nin Three-Dimensional and Self-Rectifying Vertical Pt/Ta<sub>2</sub>O<sub>5</sub>/Al<sub>2</sub>O<sub>3</sub>/TiN Memristors

This study introduces a Ta<sub>2</sub>O<sub>5</sub>-based\nself-rectifying\nmemristor (SRM) with an Al<sub>2</sub>O<sub>3</sub> interfacial layer\nadopted to improve switching uniformity, read voltage margin, and\nlong-term retention. The Pt/Ta<sub>2</sub>O<sub>5</sub>/Al<sub>2</sub>O<sub>3</sub>/TiN (PTAT) device exhibits a 10<sup>5</sup> rectification\nratio, 10<sup>4</sup> on/off ratio, 2 × 10<sup>6</sup> endurance,\nand retention of 10<sup>4</sup> s at 150 °C. A 3-layer 4 ×\n4 vertical resistive random access memory structure exhibits uniform\nswitching parameters. The coefficient of variation (CV) for device-to-device\nmeasurements is 0.23 for the low resistance state (LRS) and 0.22 for\nthe high resistance state (HRS), while for cycle-to-cycle measurements,\nthe CV is 0.38 for the LRS and 0.11 for the HRS. Finally, the present\nstudy demonstrates the superior performance of the PTAT devices in\nthe context of hardware-aware training for a fully connected neural\nnetwork implementation. These advancements position the PTAT device\nas a promising candidate for high-density three-dimensional storage\nclass memory and low-power neural networks, offering the consistent\nperformance and reliability necessary for future high-density storage\napplications.