Uniformity,\nLinearity, and Symmetry Enhancement in\nTiO<sub><i>x</i></sub>/MoS<sub>2–<i>x</i></sub>O<sub><i>x</i></sub> Based Analog RRAM via S‑Vacancy\nConfined Nanofilament

Due\nto the stochastic formation of conductive filaments\n(CFs),\nanalog resistive random-access memory (RRAM) struggles to simultaneously\nachieve low variability, high linearity, and symmetry in conductance\ntuning, thus complicating on-chip training and limiting versatility\nof RRAM based computing-in-memory (CIM) chips. In this study, we present\na simple and effective approach using monolayer (ML) MoS<sub>2</sub> as interlayer to control the CFs formation in TiO<sub><i>x</i></sub> switching layer. The limited S-vacancies (S<sub>v</sub>) in\nMoS<sub>2–<i>x</i></sub>O<sub><i>x</i></sub> interlayer can further confine the position, size, and quantity\nof CFs, resulting in a highly uniform and symmetrical switching behavior.\nThe set and reset voltages (<i>V</i><sub>set</sub> and <i>V</i><sub>reset</sub>) in TiO<sub><i>x</i></sub>/MoS<sub>2–<i>x</i></sub>O<sub><i>x</i></sub> based\nRRAM are symmetric, with cycle-to-cycle variations of 1.28% and 1.7%,\nrespectively. Moreover, high conductance tuning linearity and 64-level\nswitching capabilities are achieved, which facilitate high accuracy\n(93.02%) on-chip training. This method mitigates the device nonidealities\nof analog RRAM through S<sub>v</sub> confined CFs, accelerating the\ndevelopment of RRAM based CIM chips.