Wafer-Scale Atomic Layer-Deposited TeO<sub><i>x</i></sub>/Te Heterostructure P‑Type Thin-Film Transistors

There\nis an increasing demand for p-type semiconductors with scalable\ngrowth, excellent device performance, and back-end-of-line (BEOL)\ncompatibility. Recently, tellurium (Te) has emerged as a promising\ncandidate due to its appealing electrical properties and potential\nlow-temperature production. So far, nearly all of the scalable production\nand integration of Te with complementary metal oxide semiconductor\n(CMOS) technology have been based on physical vapor deposition. Here\nwe demonstrate wafer-scale atomic layer-deposited (ALD) TeO<sub><i>x</i></sub>/Te heterostructure thin-film transistors with high\nuniformity and integration compatibility. The wafer-scale uniformity\nof the film is evidenced by spatial Raman mappings and statistical\nelectrical analysis. Furthermore, surface accumulation-induced good\nohmic contact has been observed and explained by the unique band alignment\nof the charge neutrality level inside the Te valence band. These results\ndemonstrate ALD TeO<sub><i>x</i></sub>/Te as a promising\np-type semiconductor for monolithic three-dimensional integration\nin BEOL CMOS applications incorporated with well-established n-type\nALD oxide semiconductors.

Publication Details

Journal
Figshare
Published
2024-10-01
DOI
https://doi.org/10.1021/acs.nanolett.4c02969.s001
Primary Topic
Ga2O3 and related materials
Type
article
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Wafer-Scale Atomic Layer-Deposited TeOx/Te Heterostructure P‑Type Thin-Film Transistors

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Ga2O3 and related materials
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Wafer-Scale Atomic Layer-Deposited TeOx/Te Heterostructure P‑Type Thin-Film Transistors

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Abstract

There\nis an increasing demand for p-type semiconductors with scalable\ngrowth, excellent device performance, and back-end-of-line (BEOL)\ncompatibility. Recently, tellurium (Te) has emerged as a promising\ncandidate due to its appealing electrical properties and potential\nlow-temperature production. So far, nearly all of the scalable production\nand integration of Te with complementary metal oxide semiconductor\n(CMOS) technology have been based on physical vapor deposition. Here\nwe demonstrate wafer-scale atomic layer-deposited (ALD) TeO<sub><i>x</i></sub>/Te heterostructure thin-film transistors with high\nuniformity and integration compatibility. The wafer-scale uniformity\nof the film is evidenced by spatial Raman mappings and statistical\nelectrical analysis. Furthermore, surface accumulation-induced good\nohmic contact has been observed and explained by the unique band alignment\nof the charge neutrality level inside the Te valence band. These results\ndemonstrate ALD TeO<sub><i>x</i></sub>/Te as a promising\np-type semiconductor for monolithic three-dimensional integration\nin BEOL CMOS applications incorporated with well-established n-type\nALD oxide semiconductors.

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Wafer-Scale Atomic Layer-Deposited TeO<sub><i>x</i></sub>/Te Heterostructure P‑Type Thin-Film Transistors · Figshare (2024) | TGRS Research Map | TGRS