Methodologies, Architectures, and Prototypes for Scaling On- and Off-Chip Interconnects

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Publication Details

Journal
eCommons (Cornell University)
Published
2025-06-30
DOI
https://doi.org/10.7298/5bd8-y530
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
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article

Methodologies, Architectures, and Prototypes for Scaling On- and Off-Chip Interconnects

eCommons (Cornell University)
Low-power high-performance VLSI design
article

Methodologies, Architectures, and Prototypes for Scaling On- and Off-Chip Interconnects

article en

Abstract

No abstract available for this paper.
eCommons (Cornell University)
Cornell University (US)
Openalex Percentile: Top 56%
Low-power high-performance VLSI design
DOIOpen Access PDFOpenAlex
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Methodologies, Architectures, and Prototypes for Scaling On- and Off-Chip Interconnects · eCommons (Cornell University) (2025) | TGRS Research Map | TGRS