Realization\nof Extremely High-Gain and Low-Power in\nnMOS Inverter Based on Monolayer WS<sub>2</sub> Transistor Operating\nin Subthreshold Regime

In\nthis work, we report an n-type metal-oxide-semiconductor (nMOS)\ninverter using chemical vapor deposition (CVD)-grown monolayer WS<sub>2</sub> field-effect transistors (FETs). Our large-area CVD-grown\nmonolayer WS<sub>2</sub> FETs exhibit outstanding electrical properties\nincluding a high on/off ratio, small subthreshold swing, and excellent\ndrain-induced barrier lowering. These are achieved by n-type doping\nusing AlO<sub>x</sub>/Al<sub>2</sub>O<sub>3</sub> and a double-gate\nstructure employing high-<i>k</i> dielectric HfO<sub>2</sub>. Due to the superior subthreshold characteristics, monolayer WS<sub>2</sub> FETs show high transconductance and high output resistance\nin the subthreshold regime, resulting in significantly higher intrinsic\ngain compared to conventional Si MOSFETs. Therefore, we successfully\nrealize subthreshold operating monolayer WS<sub>2</sub> nMOS inverters\nwith extremely high gains of 564 and 2056 at supply voltage (<i>V</i><sub>DD</sub>) of 1 and 2 V, respectively, and low power\nconsumption of ∼2.3 pW·μm<sup>–1</sup> at <i>V</i><sub>DD</sub> = 1 V. In addition, the monolayer WS<sub>2</sub> nMOS inverter is further expanded to the demonstration of\nlogic circuits such as AND, OR, NAND, NOR logic gates, and SRAM. These\nfindings suggest the potential of monolayer WS<sub>2</sub> for high-gain\nand low-power logic circuits and validate the practical application\nin large areas.