ENHANCING PERFORMANCE OF DIGITAL PAYMENT SYSTEMS: LEVERAGING CACHING, NON-BLOCKING I/O, AND EVENT-DRIVEN ARCHITECTURE

Abstract This article examines the issue of enhancing the performance of digital payment systems amid increasing load and growing demands for transaction processing speed. Optimization methods aimed at reducing response time and increasing throughput are studied, including the use of caching, non-blocking I/O, and event-driven architecture. The impact of architectural decisions on the efficiency of payment services is investigated, and the risks associated with incorrect implementation of these approaches are analyzed. Particular attention is paid to the organization of multi-level caching, the selection of cache invalidation strategies, and the security of cached data. Software tools and frameworks that support the implementation of non-blocking I/O and event-driven processing models are also considered.