D2.3 Digital hardware architectures

This deliverable presents the outcomes of Synthara AG's contributions to the CENTRIC project, specifi cally focusing on WP2’s objective of developing end-to-end hardware co-design strategies for energy-effi cient AI-native transceivers. Starting from NVIDIA’s Neural Receiver designed for OFDM SIMO systems, Synthara undertook extensive modifi cations to adapt the neural architecture for compatibility with low-power hardware platforms. This involved structural optimizations, normalization alterations, aggressive pruning, and quantization techniques, signifi cantly reducing computational complexity while maintaining competitive SNR performance.The optimized neural model was successfully deployed on Synthara's proprietary technologies: In Memory Computing based architectures and CNN accelerators. Detailed performance analysis identifi ed bottlenecks and informed further optimization eff orts, including the reparameterization and porting the design from a 22nm node to an advanced 6nm technology. To meet the stringent latency requirement of sub-1ms necessary for real-time applications, a novel multicore architecture was developed. The fi nal solution demonstrates the feasibility of highly effi cient AI-native transceiver implementations suitable for future 6G networks.