Frequency-Dependent Internal Gate Resistance of SiC Power MOSFETs

This article presents an analysis of the internal gate resistance of silicon carbide (SiC) power MOSFETs and its influence on the dynamic device performance. The internal gate resistance of SiC power MOSFETs features a frequency and voltage dependency that is not observed for silicon (Si) power MOSFETs, and hence, not investigated in mature Si device technology. Using numerical device modeling based on experimental electrical characterization, the low-frequency (LF) behavior of the internal gate resistance is attributed to the defects at the SiC-oxide interface. The high-frequency (HF) behavior is explained by the gate signal propagation across the die area and incorporated in a proposed MOSFET model. In the example of a reference SiC power MOSFET design, the developed model is used to evaluate the differences between the simulated and the measured switching waveforms in more detail. The results do not only reveal the physics of the internal gate resistance of SiC power MOSFETs but also highlight how the standard SPICE models, which include the internal gate resistance as a lumped resistor, can be limited in modeling the switching waveforms of SiC power MOSFETs and estimating switching losses with high accuracy.

Publication Details

Journal
Repository for Publications and Research Data (ETH Zurich)
Published
2024-12-01
DOI
https://doi.org/10.3929/ethz-b-000705985
Primary Topic
Silicon Carbide Semiconductor Technologies
Type
article
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article

Frequency-Dependent Internal Gate Resistance of SiC Power MOSFETs

Repository for Publications and Research Data (ETH Zurich)
Silicon Carbide Semiconductor Technologies
article

Frequency-Dependent Internal Gate Resistance of SiC Power MOSFETs

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Abstract

This article presents an analysis of the internal gate resistance of silicon carbide (SiC) power MOSFETs and its influence on the dynamic device performance. The internal gate resistance of SiC power MOSFETs features a frequency and voltage dependency that is not observed for silicon (Si) power MOSFETs, and hence, not investigated in mature Si device technology. Using numerical device modeling based on experimental electrical characterization, the low-frequency (LF) behavior of the internal gate resistance is attributed to the defects at the SiC-oxide interface. The high-frequency (HF) behavior is explained by the gate signal propagation across the die area and incorporated in a proposed MOSFET model. In the example of a reference SiC power MOSFET design, the developed model is used to evaluate the differences between the simulated and the measured switching waveforms in more detail. The results do not only reveal the physics of the internal gate resistance of SiC power MOSFETs but also highlight how the standard SPICE models, which include the internal gate resistance as a lumped resistor, can be limited in modeling the switching waveforms of SiC power MOSFETs and estimating switching losses with high accuracy.

Repository for Publications and Research Data (ETH Zurich)
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