Losses Evaluation on Parallel Diodes Using a Double Pulse Test Circuit
This paper aims to optimize efficiency by combining diodes, such as SiC Schottky or PiN Si in parallel. For each combination, conduction and switching losses are estimated using datasheet in addition to double pulse test circuit validation. The parallelization of each diode is studied to propose the best configuration.
Institutions
- Université Paris-Saclay (FR)
- CentraleSupélec (FR)
Publication Details
- Journal
- SPIRE - Sciences Po Institutional REpository
- Published
- 2025-06-05
- DOI
- https://doi.org/10.34746/epe2025-0122
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00