Competition between\nBipolar Conduction Modes in Extrinsically <i>p</i>‑Doped\nMoS<sub>2</sub>: Interaction with Gate Dielectric\nMatters

With reduced dimensionality and a high surface area-to-volume\nratio,\ntwo-dimensional (2D) semiconductors exhibit intriguing electronic\nproperties that are exceptionally sensitive to surrounding environments,\nincluding directly interfacing gate dielectrics. These influences\nare tightly correlated to their inherent behavior, making it critical\nto examine when extrinsic charge carriers are intentionally introduced\nto the channel for complementary functionality. This study explores\nthe physical origin of the competitive transition between intrinsic\nand extrinsic charge carrier conduction in extrinsically <i>p</i>-doped MoS<sub>2</sub>, highlighting the central role of interactions\nof the channel with amorphous gate dielectrics. By providing a pristine\ninterface to the channel and controlling the degree of such interaction\nusing hexagonal boron nitride (h-BN) spacers of different thicknesses,\nwe determined three distinctive interaction modes: noncontact, proximity,\nand direct-contact. In the direct-contact mode without an h-BN spacer,\ncharge transfer and orbital mixing induce ambipolar conduction in\nfew-layer <i>p</i>-doped MoS<sub>2</sub>, showing an unexpected\ngate-dependent crossover between coexisting extrinsic and intrinsic\nconduction. Kelvin probe force microscopy and Raman spectroscopy confirm <i>n</i>-type doping in the channel through dielectric interactions,\nfurther supported by first-principles calculations identifying unpassivated\nsilicon dangling bonds on the SiO<sub>2</sub> surface as the origin\nof <i>n</i>-doping. On the contrary, depending on the thickness\nof the h-BN spacers, the noncontact mode maintains degenerate <i>p</i>-type conduction in the transfer curve, while the proximity\nmode enables gate-responsive <i>p</i>-type conduction, emphasizing\nthe significant role of dielectric interactions in modulating charge\ntransport. These findings underscore the importance of dielectric\nengineering in optimizing 2D semiconductor devices, particularly for\nimproving the <i>p</i>-type transistor performance.