Sampled‐Data Time‐Mode Analog Integrators

ABSTRACT In this work, sampled‐data time‐mode lossless, leaky and bilinear approximation integrators are proposed, suitable for synchronous time‐mode signal processing. The time‐mode signal that is processed is the pulse width of constant‐frequency pulses, which is equivalent to pulse‐width modulation (PWM) processing. The integrators are designed based on a novel representation of time‐domain information, which can process both positive and negative values and results in a new method for summation/subtraction PWM operation in time‐mode. The output of integrators is directly in time‐mode and synchronous with the sampling clock, and therefore, they can be used as modular blocks for higher complexity time‐mode systems. The proposed integrators are implemented in TSMC 65‐nm technology node, under 1.2‐V voltage supply, with 5 MS/s sampling rate. Based on post‐layout simulations, the power dissipation of lossless, leaky, and bilinear integrator is 61.9, 97.2, and 150 W, respectively.