Scallop smoothing process for uniform gold coating on DRIE-etched surfaces in ion-trap chips

Semiconductor-based ion-trap chips are a leading platform for scalable quantum computing, but their performance is often limited by photogenerated charge carriers accumulating on exposed silicon surfaces. In this work, we present a comprehensive fabrication process for silicon-on-insulator (SOI) wafer–based ion-trap chips that addresses this challenge through optimized scallop smoothing and angled gold evaporation. We compare two scallop smoothing methods–frontside reactive ion etching (RIE) and backside RIE–and develop optimized process recipes for each using iterative test structures. Backside RIE smoothing achieves near-complete scallop removal with minimal undercut, while frontside RIE smoothing, although requiring tighter control to minimize undercut, remains viable when preservation of the buried oxide (BOX) layer is necessary. The use of SOI substrates ensures consistent device-layer thickness by leveraging the BOX as an etch-stop layer during backside deep RIE, further enhancing the reproducibility of smoothing. Finally, angled gold evaporation following the scallop smoothing process yields uniform gold coverage on vertical sidewalls without causing electrical shorts between electrode structures. Scanning electron microscopy confirms clean sidewalls and defect-free gold films. These process improvements suppress semiconductor charging, stabilize ion confinement, and enable reliable, high-fidelity quantum operations in quantum charge-coupled device architectures.