Neurosynaptic Core Prototype for Memristor Crossbar Arrays Diagnostics
The use of neural network technologies is becoming more widespread today, from automating routine office tasks to developing new medicines. However, at the same time, the load on power grids and generation systems increases significantly, which, alongside the desire to increase equipment performance, further motivates the development of specialized architectures for hardware implementation and training of neural networks. Memristor-based systems are considered one of the promising areas for creating energy-efficient platforms for artificial intelligence (AI) due to their ability to implement in-memory computing at the hardware level. A crucial step towards the realization of such systems is the comprehensive characterization of memristive devices. This work presents the implementation of a hardware platform for the automated measurement of key memristor characteristics, including current-voltage (I-V) curves, retention time, and endurance. The developed device features a modular architecture for validating the functionality of individual subsystems and incorporates a unipolar pulse switching scheme to mitigate the risk of gate-oxide breakdown in 1T1R active arrays that can occur when applying negative voltages during synaptic weight programming.
Authors
- I. A. Surazhevsky (ORCID: https://orcid.org/0000-0003-1495-0851)
- V. V. Rylkov (ORCID: https://orcid.org/0000-0003-3191-0202)
- В. А. Демин (ORCID: https://orcid.org/0000-0001-9142-4295)
- I. V. Alyaev
- Dmitry V. Ichyotkin
Institutions
- Kurchatov Institute (RU)
Publication Details
- Journal
- Electronics
- Published
- 2025-12-18
- DOI
- https://doi.org/10.3390/electronics14244965
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00